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Your search returned 6 records. Click on the hyperlinks to view further details of Titles.. |
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Magazine Name : Ieee Transactions On Very Large Scale Intergration (Vlsi) Systems
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Year : 2001 Volume number : 09 Issue: 04 |
Unified Vlsi Systolic Array Design For Lz Data Compression
(Article)
Subject:
Cam
,
Data Compression
,
Lz77
,
Lz78
Author:
S. A
Hwang
C. W
Wu
page:
489
-
499
Evaluating Power Consumption Of Parameterized Cache And Bus Architectures In System-On-A-Chip Designs
(Article)
Subject:
Architectures With Parameterizable Cache
,
Evaluating Power Consumption
Author:
T. D
Givargis
J
Henkel
F
Vahid
page:
500
-
508
A Reconfigurable Multifunction Computing Cache Architecture
(Article)
Subject:
Cache Memory
,
Reconfigurable Computing
Author:
H.
Kim
A. K
Somani
A
Tyagi
page:
509
-
523
Funstate-An Internal Design Representation For Codesign
(Article)
Subject:
Formal Verification
,
High-Level Synthesis
,
Symbolic Scheduling
Author:
K
Strehl
L
Thiele
M
Gries
D
Ziegenbein
page:
524
-
544
An Fpga-Based Performance Evalution Of The Aes Block Cipher Candidate Algorithm Finalists
(Article)
Subject:
Algorithm Agility
,
Block Cipher
,
Cryptography
,
Vhdl
Author:
A. J
Elbirt
W
Yip
B
Chetwynd
C
Paar
page:
545
-
557
Correction To "Design Of Synchronous And Asynchronous Variable-Latency Pipelined Multipliers"
(Article)
Subject:
Design Of Synchronous
,
Asynchronous Variable-Latency
Author:
M
Olivieri
page:
558
-
559
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